2D Materials for Back end of line Interconnect and Valleytronic Applications

Webex:  https://rensselaer.webex.com/rensselaer/j.php?MTID=m7a637e516d8e6a68b1a0e6c3557d198e

2D materials have unique properties that can be utilized in designing next generation interconnects or novel devices for logic computation and information storage at the back-end-of-line. For example, some 2D materials have been considered as alternative barrier/liner to replace conventional TaN/Ta bilayer, since these atomically thin materials are proven to be able to efficiently block Cu diffusion and their atomically thin body thickness can maximize Cu volume in ultra-scaled interconnects to achieve lower line resistance. In this talk, I will show that the diffusion barrier and liner properties of several 2D materials are investigated by various characterization methods. We observe that the lifetime of the dielectrics surrounding Cu electrodes can be significantly extended with the presence of the tested 2D barriers, providing strong evidence for promising alternative barrier/liner solutions. In the 2nd half of my talk, I will discuss the possibility of manipulating entangled charge, spin, and valley degrees of freedom in 2D transition metal dichalcogenide (TMD) materials for logic in memory applications. I will first show that valley current can be electrically induced and detected through in monolayer molybdenum disulfide. Significantly, valley transport is observed over four-micron distance in monolayer samples at room temperature. I will then show the valley coupled spin generation in monolayer tungsten disulfide and spin diffusion in a 2D stack device. Our device design approach provides a unique way to integrate charge, spin and valley degrees of freedom, which can be useful for emerging valleytronic based in memory computing.