Electrochemical Deposition for Microelectronic Interconnects
Since the beginning of the microelectronics era ongoing miniaturization of transistors has been accompanied by the development of ever more intricate interconnects. Presently these range from nanoscale on-chip wiring to 3D TSV for chip stacking along with related structures for advanced packaging and printed circuit board applications. Electrodeposition has been a key process in the void-free fabrication of recessed patterned Cu interconnects by virtue of surfactant-mediated superconformal film growth.
